It is well known that microcontrollers sample for the presence of an interrupt at the end of the instruction being executed. The microcontroller saves the interrupted program's next instruction address, currently residing in its program counter (pc), and then loads the starting address of the interrupt service routine. The new value then goes to the address bus so that the first instruction of the service routine can be fetched for execution.
The interrupted program address is generally saved by "pushing" it into a memory stack, which is a block of memory utilized as a first-in-last-out buffer, or by storing the address in a temporary register.
It is well known that an on chip microcontroller might service interrupt requests from either on chip components or off chip components. In systems where such multiple interrupt requests sources are present, priority resolution among the interrupt requests must be clearly established so that the microcontroller can determine which interrupt request to service. Depending on the system architecture, this priority resolution may or may not add to the interrupt latency. At the end of an interrupt service routine, the saved program address is reloaded into the microcontroller, so that the interrupted program can resume its execution. During system test and debug it is particularly helpful to access the interrupt requests so that problems, if any, can be diagnosed and corrected.
Because none of the prior art interrupt systems for a microcontroller embedded in an integrated circuit are entirely satisfactory. It is therefore desirable to provide an improved system for handling interrupt request signals on an integrated circuit which is more flexible in respond to both on chip and off chip components and yet can be easily tested and debugged.